Figures from the book Although these figures are covered by copyright, the publisher extends permission to any instructor who is using this text,  to incorporate a copy of figures in instructional materials used with the text. Postscript PDF Chapter 1 Introduction And Overview Part I Basics Chapter 2 Fundamentals Of Digital Logic figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11, figure 12, figure 13, figure 14, figure 15, figure 16, figure 17, figure 18 figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11, figure 12, figure 13, figure 14, figure 15, figure 16, figure 17, figure 18 Chapter 3 Data And Program Representation figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10 figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10 Part II Processors Chapter 4 The Variety Of Processors And Computational Engines figure 1, figure 2, figure 3, figure 4, figure 1, figure 2, figure 3, figure 4, Chapter 5 Processor Types And Instruction Sets figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11, figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11, Chapter 6 Operand Addressing And Instruction Representation figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, Chapter 7 CPUs: Microcde, Protection, And Processor Modes figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11 figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11 Chapter 8 Assembly Languages And Programming Paradigm figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11 figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11 Part III Chapter 9 Memory and Storage Chapter 10 Physical Memory And Physical Addressing figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11, figure 12 figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11, figure 12 Chapter 11 Virtual Memory Technologies And Virtual Addressing figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11, figure 12, figure 13 figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11, figure 12, figure 13 Chapter 12 Caches and Caching figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11, figure 12, figure 13 figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11, figure 12, figure 13 Part IV Input/Output Chapter 13 Input/Output Concepts And Terminology figure 1, figure 2, figure 3, figure 1, figure 2, figure 3, Chapter 14 Buses And Bus Architectures figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11, figure 12, figure 13, figure 14, figure 15, figure 16, figure 17 figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11, figure 12, figure 13, figure 14, figure 15, figure 16, figure 17 Chapter 15 Programmed and Interrupt-Driven I/O figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11, figure 12, figure 13, figure 14, figure 15, figure 16, figure 17, figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11, figure 12, figure 13, figure 14, figure 15, figure 16, figure 17, Chapter 16 figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11, figure 12 figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9, figure 10, figure 11, figure 12 Part V Advanced Topics Chapter 17 Parallelism figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9 figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7, figure 8, figure 9 Chapter 18 Pipelining figure 1, figure 2, figure 3, figure 4, figure 5, figure 6 figure 1, figure 2, figure 3, figure 4, figure 5, figure 6 Chapter 19 Assessing Performance figure 1, figure 1, Chapter 20 Architecture Examples And Hierarchy figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7 figure 1, figure 2, figure 3, figure 4, figure 5, figure 6, figure 7 For queries about the site, please contact <subraman@purdue.edu>